Programmable logic devices are ideal for packet processing. They can be reprogrammed to adapt to different
networks, traffic profiles or applications. Unfortunately, an FPGA's architecture is limited by its slow interconnect
and reaches its limits when line rates approach 100 Gbps. ABAX2™ devices and Spacetime® technology overcome
these limitations resulting, in major design advances.
Stylus provides a synthesis, placement, and routing flow familiar to FPGA designers and uses industry-standard RTL and design constraints. It automatically exploits the unique advantages of Tabula's Spacetime 3D architecture, unleashing the ABAX2 3PLDs' unmatched capabilities and achieving unparalleled performance with surprising ease.
DesignInsight™ technology provides full observability at speed during the entire life cycle for products based on Tabula's ABAX™² family of devices, enabling full- verification and validation of the system from design to production deployment.
Intel’s 22nm Process Featuring 3D Tri-Gate Transistors
Tabula is implementing a next-generation family of 3PLD products manufactured by Intel using its advanced 22nm manufacturing process featuring 3-D Tri-Gate transistors and co-optimized packaging technology. This is made possible by a manufacturing access agreement between Tabula Inc., and Intel Custom Foundry, a division of the Technology and Manufacturing Group of Intel Corporation. The 3PLD family will be based on Tabula's next-generation 3D Spacetime architecture and will deliver high-performance, cost-effective solutions for network infrastructure systems requiring high-bandwidth data flows such as Switches, Routers, Packet Inspection appliances, and other high-performance systems. The combination of process and architecture will allow Tabula to produce high-performance programmable circuits that consume significantly less chip area than circuits implemented with traditional FPGA fabrics.
About the Intel 22nm Process featuring 3D Tri-Gate transistors
Intel's 22nm Tri-Gate transistors offer an unprecedented combination of power savings and performance gains compared to planar transistors. The 3-D Tri-Gate transistor uses three conducting gates wrapped around a vertical fin structure (the silicon channel in a 3-D structure), providing fully-depleted operation and thus enabling an exceptional combination of performance and energy efficiency.
Thus, current flow is controlled on three sides of the channel (top, left and right) rather than just from the top, as in conventional planar transistors (see the figure). The net result is much better control of the transistor, maximizing current flow (for best performance) when it is on, and minimizing it (reducing leakage) when it is off. Additionally, the small features, coupled with the better gate control, allow the transistors to switch very fast, thus permitting logic fabrics to operate at multi-GHz clock speeds.
"Intel's 3-D Tri-Gate transistors are a revolutionary breakthrough and provide an unprecedented combination of improved performance and energy efficiency, which Intel and our manufacturing customers like Tabula can use to bring superior computing capabilities to market. Intel has worked closely with Tabula throughout the product design cycle to co-optimize Tabula's 3PLD family with Intel's 22nm manufacturing process and design kits," said Sunit Rikhi, vice president, Technology and Manufacturing Group, Intel.