Computational complexity increases with each generation of wireless solutions. In order to increase the data bit rates within the confines of fixed allocated spectrum, more advanced techniques are used to improve spectral efficiency. Techniques used in 4G LTE include interference cancellation, multi-path fading mitigation and exploitation, and adaptive systems.
Such implementations can be demanding, especially on equipment that rely on general-purpose processors or DSP processors as the main compute engine, as the performance requirements begin to exceed the processor capabilities. Hardware solutions, such as programmable logic devices with their performance advantages, are better suited for these advanced implementations. As an example of increasing processing requirements, the future 4G LTE requirement to support 4x4 MIMO over 2x2 MIMO and the spectrum growth advancing from 5 MHz to 10 MHz and then to 20 MHz may require several GMACs in processing power that DSP processors can not provide effectively.
It should be noted that current techniques used to improve spectral efficiency produce results that are still far below theoretical limits. This implies that we can expect even more advanced algorithmic techniques and computational efforts in future generations of wireless equipment as the progress to increase wireless data bit rates continues. It has been shown that algorithmic complexity is exponential with respect to wireless data rate increases, and that such complexity growth outpaces silicon advances1. This means the performance gap between DSP processors and programmable logic will continue to grow with each new wireless generation.
In addition to the performance requirements discussed above, cost pressures are influencing design decisions. Traditional DSP processor solutions are not as cost effective as programmable logic devices that contain embedded DSP macros.
1 Source: Ravi Subramanian, Morphics Technology, Inc. (now Infineon), IEEE ComSoc SCV 1999
